Publications by C-DEN Members


AuthorTitlePublication NameYear
Yow-Gwo Wang; Andrew Neureuther; Patrick NaulleauImpact of noise sources and optical design on defect sensitivity for EUV actinic pattern inspectionSPIE Advanced Lithography2016
Yow-Gwo Wang; Andrew Neureuther; Patrick NaulleauEnhancing native defect sensitivity for EUV actinic blank inspection: optimized pupil engineering and photon noise study SPIE Advanced Lithography2016
S. Bang, K. Han, A. B. Kahng and M. LuoDelay Uncertainty and Signal Criticality Driven Routing Channel Optimization for Advanced DRAM ProductsAsia and South Pacific Design Automation Conf.2016
A. B. Kahng, J. Li and L. WangImproved Flop Tray-Based Design Implementation for Power ReductionIEEE/ACM International Conference on Computer-Aided Design2016
K. Y. Chung, A. B. Kahng and J. LiComprehensive Optimization of Scan Chain Timing During Late-Stage IC ImplementationACM/IEEE Design Automation Conf.2016
W.-T. J. Chan, A. B. Kahng and J. LiRevisiting 3DIC Benefit with Multiple TiersACM/IEEE International Workshop on System-Level Interconnect Prediction2016
K. Han, A. B. Kahng and J. LiImproved Performance of 3DIC Implementations Through Inherent Awareness of Mix-and-Match Die StackingDesign, Automation and Test in Europe2016
Aamod Shanker Feature size dependence of mask topography induced phase effects in an aerial imaging tool SPIE Photomask 2016
Yasmine Badr, Puneet GuptaTechnology path-finding for directed self-assembly for via layersSPIE Advanced Lithography 2016
Yasmine Badr, Andres Torres, Puneet GuptaMask Assignment and DSA Grouping for DSA-MP Hybrid Lithography for sub-7nm Contact/Via HolesIEEE Transactions on CAD2016
Liheng Zhu, Yasmine Badr, Shaodi Wang, Subramanian Iyer, and Puneet GuptaAssessing Benefits of a Buried Interconnect Layer in Digital DesignsIEEE Transactions on CAD2016
Suchit Bhattarai, Andrew R. Neureuther, Patrick P. NaulleauStudy of Energy Delivery and Mean Free Path of Low Energy Electrons in EUV ResistsProceedings of SPIE2016
Wei-Che Wang and Puneet GuptaEfficient Layout Generation and Design Evaluation of Vertical Channel DevicesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)2016
Peng Zheng, Daniel Connelly, Fei Ding and Tsu-Jae King LiuSimulation-Based Study of the Inserted-Oxide FinFET for Future Low-Power System-on-Chip ApplicationsElectron Device Letters, IEEE2015
Yow-Gwo Wang, Andy Neureuther, Patrick NaulleauThe study of phase effects in EUV mask pattern defects2015 SPIE Photomask Technology2015
Yow-Gwo Wang, Ryan Miyakawa, Weilun Chao, Markus Benk, Antoine Wojdyla, Alex Donoghue, David Johnson, Kenneth Goldberg, Andy Neureuther, Ted Liang, Patrick NaulleauEnhancing defect detection with Zernike phase contrast in EUV multilayer blank inspectionSPIE Advanced Lithogrpahy2015
Suchit Bhattarai, Weilun Chao, Shaul Aloni, Andrew R. Neureuther, Patrick P. NaulleauAnalysis of Shot Noise Limitations due to Absorption Count in EUV ResistsSPIE Advanced Lithography2015
R. A. Claus, Y.-G.Wang, A. Wojdyla, M. P. Benk, K. A. Goldberg, A. R. Neureuther, P. P. Naulleau, L. WallerPhase measurements of EUV mask defectsSPIE Advanced Lithography2015
R. A. Claus, A. Wojdyla, M. P. Benk, K. A. Goldberg, A. R. Neureuther, P. P. Naulleau, L. WallerAberration estimation using EUV mask roughnessSPIE Advanced Lithography2015
Aamod Shanker, Lei Tian, Martin Sczyrba, Falk Lange, Brid Connolly, Andy Neureuther, and L. WallerCharacterizing the dependence of thick-mask edge effects on feature size and illumination angle using AIMS imagesSPIE Advanced Lithography2015
Kwangsoo Han, Andrew B, Kahng, jongpil Lee, Jiajia Li and Siddhartha NathA Global-Local Optimization Framework for Simultaneous Multi-Mode Multi-Corner Clock Skew Variation ReductionDAC2015
Taeseung Kim, Younghee Kim, Jack Kun-Chieh Chen, and Jane P. ChangViable chemical approach for patterning nanoscale magnetoresistive random access memory magnetic metal elementsJournal of Vacuum Science & Technology A2015
Kwangsoo Han, Andrew B. Kahng and Hyein Lee,Evaluation of BEOL Design Rule Impacts Using an Optimal ILP-Based Detailed RouterDesign Automation Conference (DAC)2015
Shaodi Wang, Andrew Pan, Chi On Chui, Puneet GuptaCEED: A Pareto Optimization-based Circuit-level Evaluator for Emerging Devices Very Large Scale Integration (VLSI) Systems, IEEE Transactions on2015
Abde Ali Kagalwalla, Puneet GuptaEffective Model-Based Mask Fracturing for Mask Cost ReductionDesign Automation Conference (DAC)2015
Yasmine Badr, Andres Torres, Puneet GuptaIncorporating DSA in multipatterning semiconductor manufacturing technologiesSPIE 2015
Yasmine Badr, Andres Torres, Puneet GuptaMask Assignment and Synthesis of DSA-MP Hybrid Lithography for sub-7nm Contacts/ViasDesign Automation Conference (DAC)2015
Yasmine Badr, Andres Torres, Puneet GuptaMask Assignment and Synthesis of DSA-MP Hybrid Lithography for sub-7nm Contacts/ViasDesign Automation Conference (DAC)2015
Peng Zheng, Yi-Bo Liao, Nattapol Damrongplasit, Meng-Hsueh Chiang and Tsu-Jae King LiuVariation-Aware Comparative Study of 10-nm GAA Versus FinFET 6-T SRAM Performance and YieldIEEE TRANSACTIONS ON ELECTRON DEVICES2014
Rene A. Claus, Andrew R. Neureuther, Patrick P. Naulleau, Laura WallerEffect of Amplitude Roughness on EUV Mask SpecificationSPIE Photomask Technology 20142014
Aamod Shanker, Lei Tian, Martin Sczyrba, Brid Connolly, Andy Neureuther, Laura WallerTransport of Intensity phase imaging in the presence of curl effects induced by strongly absorbing photomasksApplied Optics2014
Taeseung Kim, Jack Kun-Chieh Chen, and Jane P. ChangThermodynamic assessment and experimental verification of reactive ion etching of magnetic metal elementsJournal of Vacuum Science & Technology A2014
Yasmine Badr, Ko-wei Ma, Puneet GuptaLayout Pattern-driven Design Rule EvaluationJM32014
Yow-Gwo Wang, Ryan Miyakawa, Weilun Chao, Kenneth Goldberg, Andy Neureuther, and Patrick NaulleauPhase-enhanced defect sensitivity for EUV mask inspectionSPIE Photomask Technology 20142014
Wei-Che Wang and Puneet GuptaEfficient Layout Generation and Evaluation of Vertical Channel DevicesInternational Conference on Computer-Aided Design (ICCAD)2014
Aamod Shanker, Martin Sczyrba, Brid Connolly, Franklin Kalk, Andy Neureuther, Laura WallerCritical Assessment of the Transport of Intensity Equation as a phase recovery technique in optical lithographySPIE Advanced Lithography 2014
Suchit Bhattaraia, Weilun Chao, Andrew R. Neureuther, Patrick P. NaulleauComparative Analysis of Shot Noise in EUV and E-Beam LithographyProceedings of SPIE2014
Tuck Boon Chan, Puneet Gupta, Kwangsoo Han, Abde Ali Kagalwalla, Andrew B. Kahng and Emile SahouriaBenchmarking of Mask Fracturing HeuristicsInternational Conference on Computer-Aided Design (ICCAD)2014
Rene A. Claus; A. R. Neureuther; L. Waller; P. P. NaulleauPredicting LER PSD Caused by Mask Roughness Using a Mathematical ModeSPIE Advanced Lithography 20142014
Yow-Gwo Wang, Ryan Miyakawa, Andy Neureuther, Patrick NaulleauZernike phase contrast microscope for EUV mask inspectionSPIE Advanced Lithography2014
Abde Ali Kagalwalla and Puneet GuptaComprehensive Defect Avoidance Framework for Mitigating EUV Mask DefectsSPIE Advanced Lithography Symposium2014
A. A. Kagalwalla, M. Lam, K. Adam, and P. GuptaEUV-CDA: Pattern Shift Aware Critical Density Analysis for EUV Mask LayoutsProc. Asia and South Pacific Design Automation Conference2014
Rene A. Claus ; I. Mochi ; M. P. Benk ; K. A. Goldberg ; A. R. Neureuther ; P. P. NaulleauRecovering effective amplitude and phase roughness of EUV masksPhotomask Technology 20132013
Abde Ali Kagalwalla and Puneet GuptaDesign-Aware Defect-Avoidance Floorplanning of EUV MasksIEEE Transactions on Semiconductor Manufacturing2013
Rani S. Ghaida, Mukul Gupta and Puneet GuptaA Framework for Exploring the Interaction between Design Rules and Overlay ControlSPIE Advanced Lithography 20132013
Rene A. Claus, Andrew R. Neureuther, Patrick P. NaulleauMathematical model for calculating speckle contrast through focusSPIE Advanced Lithography 20132013
Yi-Bo Liao, Meng-Hsueh Chiang, Nattapol Damrongplasit, Tsu-Jae King Liu6-T SRAM Cell Design with Gate-All-Around Silicon Nanowire MOSFETsthe 20th International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)2013
Suchit Bhattarai, Patrick Naulleau, Andy NeureutherSimulation of the Relationship Between Sensitivity and LWR in an EUV Resist with Photo-Decomposable QuencherSPIE Advanced Lithography Conference2013
John Lee, Puneet Gupta and Fedor PikusParametric Hierarchy Recovery in Layout Extracted NetlistsIEEE Computer Society Annual Symposium on VLSI2012
John Lee and Puneet GuptaImpact of Range and Precision in Technology on Cell-Based DesignIEEE/ACM International Conference on Computer-Aided Design (ICCAD)2012
R. S. Ghaida and P. GuptaDRE: a Framework for Early Co-Evaluation of Design Rules, Technology Choices, and Layout MethodologiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2012
Ying Qiao, Kun Qian, Costas J. SpanosVariability-Aware Compact Model Characterization for Statistical Circuit Design OptimizationIEEE/ACM International Conference on Computer-Aided Design 20122012
Rani S. Ghaida, Kanak B. Agarwal, Lars W. Liebmann, Sani R. Nasif, Puneet GuptaA Novel Methodology for Triple/Multiple-Patterning Layout DecompositionSPIE Advanced Lithography Symposium2012
Rani S. Ghaida, Tanaya Sahu, Parag Kulkarni, Puneet GuptaA Methodology for the Early Exploration of Design Rules for Multiple-Patterning TechnologiesIEEE/ACM International Conference on Computer-Aided Design 20122012
Tuck-Boon Chan and Andrew B. KahngTunable Sensors for Process-Aware Voltage ScalingIEEE/ACM International Conference on Computer-Aided Design 20122012
N. Xu, C. Shin, F. Andrieu, B. Ho, W. Xiong, B.-Y. Nguyen, M. Choi, O. Weber, V. Moroz, O. Faynot, T. Poiroux and T.-J. King LiuEffectiveness of Strained-Si Technology for Thin-Body MOSFETsInternational SOI Conference (Invited Paper)2012
G. Leung, L. Lai, P. Gupta, and C. O. Chui,Device and Circuit Level Variability Caused by Line Edge Roughness for Sub-32nm Finfet TechnologiesIEEE Transactions on Electronic Devices2012
Nuo Xu, F. Andrieu, B. Ho, B.-Y. Nguyen, O. Weber, C. Mazure, O. Faynot, T. Poiroux and T.-J. King LiuImpact of Back Biasing on Carrier Transport in Ultra-Thin-Body and BOX (UTBB) Fully Depleted SOI MOSFETs2012 Symposium on VLSI Technology2012
Abde Ali Kagalwalla, Swamy Muddu, Luigi Capodieci, Coby Zelnik and Puneet GuptaDesign-of-Experiments Based Design Rule ExplorationSPIE Advanced Lithography2012
Abde Ali Kagalwalla, Puneet Gupta, Chris Progler and Steve McDonaldDesign-Aware Mask InspectionIEEE Tran. on Computer-Aided Design of Integrated Circuits and Systems2012
T.-B. Chan, P. Gupta, A. B. Kahng and L. LaiDDRO: A Novel Performance Monitoring Methodology Based on Design-Dependent Ring OscillatorsInternational Symposium on Quality Electronic Design, March 19, 20122012
John D. Gerling*, Zhongsheng S. Luo, Vorrada Loryuenyong, and Nathan W. CheungA Ubiquitous Optical Microsystem Platform for Lab-on-a-Chip with Application to Optical Metrology and Chemical Sensingto be Presented at Analytix-2012 Conference, March 23-25, 2012. Beijing, China2012
Nuo Xu, Byron Ho, Munkang Choi, Victor Moroz, Tsu-Jae King LiuEffectiveness of Stressors in Aggressively Scaled FinFETssubmitted to IEEE Transactions on Electron Devices, 20122012
Nuo Xu, Byron Ho, Francois Andrieu, Lee Smith, Bich-Yen Nguyen, Olivier Weber, Thiery Poroux, Olivier Faynot, Tsu-Jae King LiuCarrier Mobility Enhancement via Strain Engineering in Future Thin-Body MOSFETsIEEE Electron Device Letters, Vol.33, Issue 3, 20122012